Data Fabric Verification Engineer
6 - 10 years
Austin, TX
Full-time
Onsite
1 month ago
About the role
Data Fabric Verification Engineer
Sunnyvale CA or Austin TX OR Boston, MA (Complete Onsite)
Full Time
Data Fabric verification engineer: 5 to 20 years of experience
PREFERRED EXPERIENCE:
KEY RESPONSIBLITIES:
Sunnyvale CA or Austin TX OR Boston, MA (Complete Onsite)
Full Time
Data Fabric verification engineer: 5 to 20 years of experience
PREFERRED EXPERIENCE:
- Architected and developed complex verification environments in SystemVerilog, including scripting using Perl, Ruby, Make, or the likes.
- Exposure to RTL design, software development, formal verification, or other related domains.
- Good understanding of computer organization/architecture.
- Experience or familiarity with formal tools and/or functional verification tools by VCS, Cadence, Mentor Graphics
KEY RESPONSIBLITIES:
- Write tests, sequences, and testbench components in SystemVerilog and UVM along with formal to achieve verification of the design.
- Coordinate with RTL engineers to implement logic design for better clock gating and verify the various aspects of the design.
- Interact with architects, RTL designers, performance engineers, and post-silicon validation engineers to develop deep expertise in the Infinity Fabric architecture.
- Collaborate with architects, hardware engineers and multiple IP development groups.
- Drive formal verification for the block and write formal properties and assertions to verify the design
- Responsible for verification quality metrics like pass rates, code coverage and functional coverage
Skills
IT Services and IT Consulting